Hallo skul,
welche denn ? Meinst du ST Ram oder eine Magnum ST. Eine von Roland Wicklein oder hiess er anders ?
grüße
Frank
Ich habe da mal jemanden gefragt ob ich seine alten Atari Sachen zum Selbstaufbau bekommen könnte ...
---
Please see files in the attached archive.
I would like to make some comments about this upgrade:
The upgrade works as an Alt-RAM expansion, i.e. it is not a continuous
exopansion of thE ST-RAM.
TOS2.06 or Magic is needed to use it. However, testing (direct peek & poke)
is possible with lower TOS version as well, and without the driver.
The 'driver' program (goes into AUTO folder, together with its
configuration file) is not in fact a driver. It calls a TOS function
to notify the system of the existence of the Alt-RAM and then just
sits ion the memory, keeping in existence a 64 KB "fast-ram-buffer" for
disk operations from Alt-RAM.
As I accidentally obtained EPROMs of convenient size, I prorammed both
TOS 2.06 and Magic into it, with a switch to select the desired OS.
However, it turned out that Magic requies so many files from the hard disk
in order to work, that nothing is gained by putting 256KB of it into ROM;
so, there is not much need to waste time on installing Magic this way.
Try to use 120ns EPROMS to be on the safe side regarding speed. I
used 180 ns ones and it worked, but mos probably would not have worked
had I increased computer bus speed from 8MHz to e.g. 10 MHz (which, btw.
is a very simple and effective speed upgrade, but with some consequences).
IIRC, beside the expansion port on the Mega, the upgrade connects to
one of the jumpers for configuring 2-chip/6-chip TOS on Mega-s motherboard.
A signal has to be taken from there in order to boot from new TOS 2.06.
IIRC I soldered a 3-pin piece of rail on that place so that, by inserting
a jumper, I could revert easily to the original configuration upon removing
the upgrade.
There is a spare power supply connector on Mega's mainboard. Use that to
provide power to the upgrade - the expansion port does not provide
thick-enough power lines.
FRAM8.IMG is a circuit diagram of the as-built (hopefully exact?) upgrade.
I had to do some tweaking regarding power supply beacuse it seems that I
accidentally obtained the (rare?) 3.3 V SIMMs and the circuit did
not work properly until I reduced supply voltage to the DRAM modules.
Generally, this upgrade worked at last, but power consumption proved
to be too high. First, I had to replace the original PSU from the Mega
with a higher-capacity one. I do not know from which Atari device did
the stronger PSU come (a friend gave it to me). It was identical in
shape and size, but with a 4 A rating instead of usual 1.5 A.
Seconds, when the circuit was put into Mega's box, it overheated.
I installed a small additional fan, but still, as summer came with high
ambient temperatures, the circuit started working unreliably and I
finally removed it from the computer.
So, I would not very much recommend building this exact upgrade. If you
do, proceed with caution.
FR8V2.IMG is a circuit diagram of V2 of the upgrade, using one
72-pin 8MB SIMM instead of 8 30-pin 1MB SIMMs. I actually built this
upgrade (hardware completely finished), but a rather sudden deterioration
of my eyesight a couple of years ago stopped me from testing it. So
this project has been shelved, unfortunately maybe for ever.
You may notice that there are some differences in the schematics between
the two versions, e.g. use of one diffeent mux chip. As I said this design
was not tested, so I do not know if it works ok.
FR8V2MIN.IMG is a proposed circuit for a simpler RAM upgrade, without
TOS ROMs. As TOS 2.06 can be very simply loaded into RAM, it should
work as well with about 260KB loss of ST-RAM and some delay at startup
because of the time required to load TOS 2.06. This version of the
upgrade has never been built.
TESTCKT.IMG is a circuit diagram of the testing circuit that is mated to
the connector of the upgrade, so that it can be tested without
the computer. This is an improved version of a very similar circuit that I
actually used to build version 1 of the upgrade, but same as V2 of the
upgrade itsdelf, this test circuit has neever been tried. The idea behind
this circuit is that a 74192 counter, when driven with a convenient clock
frequency, can be used to generate signals with timing very similar to
RAM read / write control signals af a 8 MHz Mega, and those signals can be
used to test the operation of the upgrade with an oscilloscope (preferably
a dual-beam one). I tuned the operation of the V1 of the RAM upgrade
in this way, by adding a couple of small capacitors here and there so
that some timings were improved.
That is about all I can remember about it. If you decide to built something
like that, I may be able to answer some questions, but there are things
that I have probably forgotten, and I have never completely documented it.
So, be cautious, get an oscilloscope and prepare for some experimenting.
Also, when I announed the making of this upgrade there was some discussion
about it on atari forums on the net. It would be good if you read those
articles.
Let me know if you succed it making it work.
Btw. I still haven't given up hope completely of implementing the untested
hardware that I have built. maybe I will get my son or some friend to
do the manual work, while I oversee it.
best regards;
Djordje
Thema: Atari Fastramkarte (Gelesen 13106 mal)